The present invention relates to an active matrix liquid crystal display (AMLCD), in which no pattern mask is required to form an etch stopper.
A conventional AMLCD includes a large number of pixels and associated switching devices, such as thin film transistors (TFTs), arranged in an array. The pixels are interconnected by a plurality of gate lines, data bus lines, and pads formed at each end of the gate and data bus lines. Each pixel includes a pixel electrode, which is electrically connected to the switching devices for applying voltages depending on whether light is to be transmitted or blocked by the pixel. A storage capacitor is also included to improve the pixel's electrical characteristics.
FIG. 1A is a plan view showing a first example of a conventional AMLCD having an etch stopper formed by a back exposure method, and FIG. 1B is a cross-sectional view along the line I--I of FIG. 1A.
As shown in FIG. 1, each pixel includes: (1) a gate line 1 and data line 2, which cross each other; (2) a gate electrode 11 extending from gate line 1; (3) a semiconductor active layer 14 overlapping gate electrode 11; (4) a source electrode 16 extending from data line 2; and (5) a TFT 3 including a drain electrode 17 formed corresponding to source electrode 16. Further, a pixel electrode 19 is connected to drain electrode 17. Finally, an etch stopper, not shown in FIG. 1A, is formed having the same shape as gate line 1.
As shown in FIG. 1B, a protruding portion of the gate line serves as the gate electrode 11 of the TFT. Gate electrode 11 is formed on an insulating substrate 10, and a first insulating layer 13 is formed on an exposed surface of insulating substrate 10. Moreover, gate electrode 11 and semiconductor active layer 14 are formed overlapping the gate electrode 11.
Further, an etch stopper is formed on semiconductor active layer 14 by a back exposure method. In this instance, the method of fabricating the etch stopper includes the steps of: forming successively an insulating layer and positive photoresist film on semiconductor active layer 14 and the exposed first insulating layer; patterning the photoresist film by a back exposure process; developing the photoresist film to form a photoresist pattern; etching the insulating layer to form an etch stopper; removing the photoresist pattern.
Next, an ohmic contact layer 6 is formed on portions of etch stopper 15 and semiconductor active layer 14. Ohmic contact layer 6 does not constitute part of the channel. A source electrode 16 is then formed on semiconductor active layer 14, partially overlapping gate electrode 11. In addition, a drain electrode 17 is formed partially overlapping gate electrode 11 and symmetrically with source electrode 16. Then, a second insulating layer 18 is formed on source/drain electrodes 16 and 17 to protect insulating substrate 10. Pixel electrode 19 is then formed connected to drain electrode 17 through a contact hole formed in the second insulating layer 18. Gate electrode 11 may be formed of a conductive material capable of anode-oxidation. This material choice allows an oxide insulating layer 12 to be formed on a surface of gate electrode 11.
As described above, in a conventional AMLCD, the etch stopper is formed easily without preparing a pattern mask. This AMLCD does not improve the aperture ratio, however, because the gate electrode protrudes beyond the gate line.
FIG. 2A is a plan view showing a second example of the conventional AMLCD. The etch stopper in this example was formed using a pattern mask. FIG. 2B is a cross-sectional view taken along the line I--II of FIG. 2A.
As shown in FIG. 2A, a mostly linear gate line 22 is provided on an insulating substrate, and a data line 21 is provided crossing gate line 22. Data line 21 has a protruding portion 23 extending in the same direction as gate line 22. A drain electrode 24 is formed in corresponding relationship to a source electrode, which includes protruding portion 23 at one side of data line 21 and an inner portion lateral of data line 21. Drain electrode 24 is connected to an upper portion of pixel electrode 29. Here, drain electrode 24 overlaps part of gate line 22 and is formed at an equally spaced distance from the source electrode. The protruding portion of adjacent data line 21, drain electrode 24, and semiconductor island-shaped active layer 27 are formed such that the angle between the drain electrode and a channel region of the TFT is non-linear or L-shaped. As a result, current flows from the entire source electrode. Further, since the channel length can be increased, it is possible to reduce the physical size of the source electrode while maintaining the same level of current flow as in the general conventional TFT. A reduction in the source electrode's physical size lessens the amount of source-gate electrode overlap and thus the resulting capacitance C.sub.gs can also be reduced. Moreover, since the structure of gate line 22 is almost linear, the aperture ratio is increased.
As shown in FIG. 2B, a gate electrode of mostly linear gate line 22 is formed on an insulating substrate 20, and a first insulating layer 26-1 is formed on an exposed surface of insulating substrate 10 and gate electrode 22. Also, first insulating layer 26-1 and semiconductor active layer 27 are formed to overlap the gate electrode 22.
In this device, a pattern mask is used to form an etch stopper 28 on semiconductor active layer 27. The method of fabricating the etch stopper includes the steps of forming successively an insulating layer and positive photosensitive photoresist film on semiconductor active layer 27 and the exposed first insulating layer 26-1, exposing the photoresist film using a pattern mask, developing the photoresist film to form photoresist pattern, and etching the insulating layer to form the etch stopper.
Next, ohmic contact layer 25 is formed on portions of etch stopper 28 and semiconductor active layer 27. Then, a source electrode 23 is formed on semiconductor active layer 28 partially overlapping gate electrode 22. In addition, a drain electrode 24 is formed partially overlapping gate electrode 22. Next, a second insulating layer 26-2 is formed on source/drain electrodes 23 and 24. A pixel electrode 29 is formed and connected to drain electrode 24 through a contact hole in the second insulating layer 26-2. In this instance, gate electrode 22 may be formed of a conductive material capable of anode-oxidation. This material choice allows an oxide insulating layer 22-1 to be formed on a surface of gate electrode 22.
While this second AMLCD example also has an improved aperture ratio due to the gate line's almost linear structure, it requires using a pattern mask to form the etch stopper. This requirement adds complexity and additional cost to the AMLCD fabrication process. For this reason, a need exists for an AMLCD fabrication method which permits forming an etch stopper without the additional complexity of first forming a pattern mask on the substrate layer.